1. Field of the Invention
The present invention applies to a circuit for sampling an analog, time-continuous signal for display on a CRT tube or for digitization by an analog-to-digital converter as in a digital sampling oscilloscope. In particular, it applies to a charge sampling circuit rather than a voltage sampling circuit.
2. Description of the Related Art
Among digital sampling oscilloscopes, distinct classes can be distinguished, taking into account their mode of operation:
a) real time or single shot digitizing instruments where the sample rate is between 2 and 10 times the highest frequency of interest, PA1 b) equivalent time or repetitive instruments which are used with repetitive signals, sampling them at a frequency lower than the highest frequency of interest (undersampling) and reconstructing the signal by taking many cycles of the signal to acquire enough data to reconstruct the signal, putting every sample in its proper time position. PA1 a) sequential sampling instruments which sample a repetitive signal once every n-th cycle, sequentially incrementing the time of sampling relative to the signal cycle. In order to be able to do this, a trigger signal must first be extracted from the signal or from an external source and a sequentially incremented delay added between the trigger point and the sample point. Because it is difficult to produce long delays accurately and because of jitter in the cycle length, a sequential sampling instrument can only accurately view the portion of the signal which occurs after the trigger point. PA1 b) Random Interleaved Sampling (RIS) instruments sample the signal at their own internal rate, which is randomly related to the signal cycle, and record (for every sample acquisition) the precise time position of the sample relative to the signal cycle. The signal is then reconstructed by putting every data point in its proper time slot. The big advantage of this technique is that a RIS instrument is not restricted to show the post trigger part of the signal but can also display the portion of the signal which precedes the trigger point. PA1 (a) a common collector stage (or emitter follower), which is a voltage-input-voltage-output device, offering wide bandwidth and low reverse isolation at high frequency, limited by the transition frequency of the transistor (f.sub.T), PA1 (b) a common base stage, which is a current input current output device, offering very high bandwidth and reasonably high reverse isolation at high frequency, not limited by the transition frequency of transistor (f.sub.T).
The present invention applies to this latter class of instruments which dominate the field of data acquisition with a bandwidth above 1 GHz. Equivalent time or repetitive sampling instruments can again be divided into two classes:
As far as it is known, all repetitive sampling instruments use diode sampling gates, as, for example, in bridge quad or travelling wave configurations, to sample the signal. Such a sampling gate is made up of two to six diodes, e.g. fast low storage diodes. The diodes block the signal, except during the very short moment when the signal voltage is allowed to go through the gate and into a sampling preamplifier.
A drawback of a diode sampling gate, however, is that it is a voltage sampling device which generates sampling spikes at every sampling instant. When an instrument has to operate in RIS mode with an "internal" trigger source, the trigger circuit should not receive such sampling spikes generated on the signal by the sampling gate. To do this, an isolation buffer is inserted between the input of the instrument and the sampling gate.
The mandatory presence of this isolation buffer justifies the present invention, in view of the problems with present designs, i.e. when using a diode sampling gate with an isolation buffer:
First, the diode sampling gate needs a high amplitude (&lt;1-2 V) and a very narrow strobe sampling pulse. When operated in RIS mode, the energy fed back to the input signal by the strobe pulse can therefore be fairly large.
Second, the sampling gates are voltage driven, which means that the isolation buffer output must be a voltage.
There are two common transistor circuits available which exhibit the essential characteristics of an isolation buffer, i.e. 1) high bandwidth, and 2) high reverse isolation in the GHz area:
Thus, for reasons both of bandwidth and reverse isolation, a common base stage is better suited for an isolation buffer in front of a sampling gate. However, the output of a common base stage being a current and the diode sampling gate being a voltage sampling device, there is a need to convert the common base stage output signal back to a voltage. This is usually done at the expense of some loss of overall bandwidth.